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Quad, IEEE 802.3at/af PSE Controller
for Power-over-Ethernet
Current/Voltage Readout Registers
(R30h–R3Fh)
Port Current Registers (R30h, R31h, R34h, R35h,
R38h, R39h, and R3Ch, R3Dh)
The Port Current registers (Tables 32 and 33) provide
port current readout when a port is powered on. On
a power-up or after a reset condition, these registers
are both set to a default value of 00h. The Port Current
Readout registers have 16 total bits, but the 3 highest
bits (MSBs) and the 4 lowest bits (LSBs) are hardwired
to 0. The port current readout has 9 bits of overall actual
Table 32. Port Current Register (LSB)
ADDRESS = 30h, 34h, 38h, 3Ch
SYMBOL BIT NO. TYPE
resolution. To avoid the LSB register changing while
reading the MSB, the register contents are frozen if
addressing byte points to either of the current readout
registers. During normal operation, the port output cur-
rent can be calculated as:
I OUT_ = N IP_ x 122.07 F A/count
where N IP_ is the decimal value of the 16-bit port cur-
rent readout. The ADC saturates both at full scale and at
zero, resulting in poor current readout accuracy near the
top and bottom codes.
DESCRIPTION
7
6
5
R
R
R
IP_[7:0]
4
3
2
1
0
R
R
R
R
R
IP_[7:0] (LSB). Lower 8 bits of the 16-bit port current readout. IP_[3:0] are configured
to be hardwired to 0.
Table 33. Port Current Register (MSB)
ADDRESS = 31h, 35h, 39h, 3Dh
SYMBOL BIT NO. TYPE
DESCRIPTION
7
6
5
R
R
R
IP_[15:8]
4
3
2
1
0
R
R
R
R
R
IP_[15:8] (LSB). Lower 8 bits of the 16-bit port current readout. IP_[15:13] are config-
ured to be hardwired to 0.
42
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